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[https://riscv.org/ RISC-V] (pronounced "RISC Five") is an [https://en.wikipedia.org/wiki/RISC-V open source instruction set architecture (ISA)]. This project, informally called '''Fedora/RISC-V''', aims to provide a complete Fedora experience on the RISC-V (64 bit, RV64G) architecture. | [https://riscv.org/ RISC-V] (pronounced "RISC Five") is an [https://en.wikipedia.org/wiki/RISC-V open source instruction set architecture (ISA)]. This project, informally called '''Fedora/RISC-V''', aims to provide a complete Fedora experience on the RISC-V (64 bit, RV64G) architecture. | ||
As of November 2016 the port supports about two thirds of the packages in Fedora 25, so it is quite complete and ready to use. Most important | As of November 2016 the port supports about two thirds of the packages in Fedora 25, so it is quite complete and ready to use. Most important command-line programs just work (and even a few graphical ones). However if you are using your own hardware then you will need to supply a compatible kernel and bootloader and just use the Fedora userspace. Fedora/RISC-V does <i>not</i> support 32 bit or embedded hardware. | ||
= Topics = | = Topics = |
Revision as of 17:45, 20 November 2016
RISC-V (pronounced "RISC Five") is an open source instruction set architecture (ISA). This project, informally called Fedora/RISC-V, aims to provide a complete Fedora experience on the RISC-V (64 bit, RV64G) architecture.
As of November 2016 the port supports about two thirds of the packages in Fedora 25, so it is quite complete and ready to use. Most important command-line programs just work (and even a few graphical ones). However if you are using your own hardware then you will need to supply a compatible kernel and bootloader and just use the Fedora userspace. Fedora/RISC-V does not support 32 bit or embedded hardware.
Topics
- Architectures/RISC-V/Building - Help to build packages for Fedora/RISC-V.
- Architectures/RISC-V/Disk images - How to use the Fedora/RISC-V disk images.
- Architectures/RISC-V/FPGA - How to run Fedora/RISC-V on real hardware (well, an FPGA).
Architectures/RISC-V/Bootstrapping - We have finished bootstrapping, this section is obsolete
Downloads
- https://fedorapeople.org/groups/risc-v/
- Disk images, RPMs, SRPMs. Log files and status from the autobuilder.
- https://github.com/rwmjones/fedora-riscv-autobuild
- The autobuilder source.
- https://github.com/rwmjones/fedora-riscv-stage4
- Scripts used to build the stage4 disk image.
- https://github.com/rwmjones/fedora-riscv-kernel
- Linux kernel build scripts and patches
- http://copr-fe.cloud.fedoraproject.org/coprs/rjones/riscv/
- The COPR repository (for Fedora 24/x86_64) containing: QEMU, Spike,
cross-compiler toolchain (obsolete)
Bootstrapping is over so the following links are now obsolete:
https://github.com/rwmjones/fedora-riscvGit repository containing the bootstrapping work. Read the README file!http://oirase.annexia.org/riscv/Interim stage3 disk images built by rwmjhttp://davidlt.web.cern.ch/davidlt/riscv/Interim stage3 disk and kernel images built by davidlt.
Communications
On FreeNode IRC: #fedora-riscv
There is no specific mailing list, use the general Fedora developers' mailing list.