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* http://copr-fe.cloud.fedoraproject.org/coprs/rjones/riscv/ | * http://copr-fe.cloud.fedoraproject.org/coprs/rjones/riscv/ | ||
** COPR repository (for Fedora 24/x86_64) containing: QEMU, Spike, cross-compiler toolchain | ** COPR repository (for Fedora 24/x86_64) containing: QEMU, Spike, cross-compiler toolchain | ||
* | * https://github.com/rwmjones/fedora-riscv | ||
** Git repository containing the bootstrapping work. Read the README file! | ** Git repository containing the bootstrapping work. Read the README file! | ||
* http://oirase.annexia.org/riscv/ | * http://oirase.annexia.org/riscv/ | ||
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For the latest information, see: | For the latest information, see: | ||
https://github.com/rwmjones/fedora-riscv | |||
= Communications = | = Communications = | ||
Revision as of 19:38, 12 August 2016
RISC-V (pronounced "RISC Five") is an open source instruction set architecture (ISA). This project, informally called Fedora/RISC-V, aims to get Fedora bootstrapped on the RISC-V (64 bit) architecture.
Downloads
- http://copr-fe.cloud.fedoraproject.org/coprs/rjones/riscv/
- COPR repository (for Fedora 24/x86_64) containing: QEMU, Spike, cross-compiler toolchain
- https://github.com/rwmjones/fedora-riscv
- Git repository containing the bootstrapping work. Read the README file!
- http://oirase.annexia.org/riscv/
- Interim stage3 disk image.
Status
Last updated: 2016-08-12
Status: The stage3 disk image boots to a shell, with GCC, numerous developer utilities, and rpmbuild.
I have started using the stage3 to build stage4 RPMs.
For the latest information, see: https://github.com/rwmjones/fedora-riscv
Communications
There is no specific mailing list. Use Fedora devel for now.
On FreeNode IRC: #fedora-riscv